Allow FTZ, prec-sqrt to override no-ftz, no-prec-sqrt [8096a6fb]

Implement support for NVIDIA architectures (such as nvidia_gpu_sm_80) as argument to fsycl-targets [e5de913f]

Implement matrix extension using new “unified” interface [166bbc36]

Support zero range kernel for cuda backends [a3958865]

Add missing macro to interop-backend-traits.cpp [a578c8141]

Allow varying program metadata in CUDA backend [25d05f3d]

Updated tf32 device code check comment [21176576]

Support for sycl::half type

Support for bf16 builtins operating on storage types

Support for the SYCL builtins from relational, geometric, common and math categories

Support for sub_group extension

Support for group algorithms

Support for group_ballot intrinsic

Support for atomics with scopes and memory orders

Support for multiple streams in each queue to improve concurrent execution

Support for sycl::queue::mem_advise

Support for --ffast-math in CUDA libclc

Support for device side assert

Support for float and double exchange and compare exchange atomic operations in CUDA libclc

Enabled CXX standard library functions

Native event for default-ctored sycl::event has to be in COMPLETE state

Added bf16 builtins for fma, fmin and fmax

Support for sycl::aspect::fp16

Added tanh (for floats/halfs) and exp2 (for halfs) native definitions

Support for sycl::get_native(sycl::buffer)

Implemented mem_advise reset and managed concurrent memory checks

Support for element-wise operations on joint_matrix including bfloat16 support

Support for Unified Shared Memory (USM)